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公开(公告)号:US20220334752A1
公开(公告)日:2022-10-20
申请号:US17233317
申请日:2021-04-16
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Kishore Kumar MUCHHERLA , Sampath K RATNAM , Shane NOWELL , Peter FEELEY , Sivagnanam Parthasarathy , Mustafa N Kaynak
IPC: G06F3/06
Abstract: A processing device of a memory sub-system is configured to identify a plurality of blocks assigned to a first voltage bin of a plurality of voltage bins of a memory device; identify a subset of the plurality of blocks having a time after program (TAP) within a predetermined threshold period of time from a second TAP associated with a transition boundary between the first voltage bin and a subsequent voltage bin of the plurality of voltage bins; determine a threshold voltage offset associated with the subset of blocks; and associate the threshold voltage offset with the subsequent voltage bin.
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公开(公告)号:US20220293208A1
公开(公告)日:2022-09-15
申请号:US17198755
申请日:2021-03-11
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Kishore Kumar MUCHHERLA , Mustafa N. KAYNAK , Sivagnanam PARTHASARATHY , Xiangang LUO , Peter FEELEY , Devin M. BATUTIS , Jiangang WU , Sampath K RATNAM , Shane NOWELL , Karl D. Schuh
Abstract: A voltage calibration scan is initiated. A first value of a data state metric measured for a sample block of a memory device based on associated with a first bin of blocks designated as a current is received. The first value is designated as a minimum value. A second value of the data state metric for the sample block is measured based on a set of read voltage offsets associated with a second bin of blocks having an index value higher than the current bin. In response to determining that the second value exceeds the first value, the first bin is maintained as the current bin and the voltage calibration scan is stopped.
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