Invention Application
- Patent Title: DIELECTRIC LINER FOR FIELD EFFECT TRANSISTORS
-
Application No.: US17238376Application Date: 2021-04-23
-
Publication No.: US20220344213A1Publication Date: 2022-10-27
- Inventor: Zhi-Chang Lin , Shih-Cheng Chen , Kuo-Cheng Chiang , Kuan-Ting Pan , Jung-Hung Chang , Lo-Heng Chang , Chien Ning Yao
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L29/786 ; H01L29/423

Abstract:
The present disclosure describes a semiconductor structure with a dielectric liner. The semiconductor structure includes a substrate and a fin structure on the substrate. The fin structure includes a stacked fin structure, a fin bottom portion below the stacked fin structure, and an isolation layer between the stacked fin structure and the bottom fin portion. The semiconductor structure further includes a dielectric liner in contact with an end of the stacked fin structure and a spacer structure in contact with the dielectric liner.
Public/Granted literature
- US11929287B2 Dielectric liner for field effect transistors Public/Granted day:2024-03-12
Information query
IPC分类: