Invention Application
- Patent Title: Source/Drain Features With Improved Strain Properties
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Application No.: US17314815Application Date: 2021-05-07
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Publication No.: US20220359752A1Publication Date: 2022-11-10
- Inventor: Chih-Ching Wang , Wen-Yuan Chen , Wen-Hsing Hsieh , Kuan-Lun Cheng , Chung-Wei Wu , Zhiqiang Wu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/06 ; H01L29/423 ; H01L29/786 ; H01L21/02 ; H01L21/265 ; H01L29/66

Abstract:
A method includes receiving a semiconductor substrate. The semiconductor substrate has a top surface and includes a semiconductor element. Moreover, the semiconductor substrate has a fin structure formed thereon. The method also includes recessing the fin structure to form source/drain trenches, forming a first dielectric layer over the recessed fin structure in the source/drain trenches, implanting a dopant element into a portion of the fin structure beneath a bottom surface of the source/drain trenches to form an amorphous semiconductor layer, forming a second dielectric layer over the recessed fin structure in the source/drain trenches, annealing the semiconductor substrate, and removing the first and second dielectric layers. After the annealing and the removing steps, the method further includes further recessing the recessed fin structure to provide a top surface. Additionally, the method includes forming an epitaxial layer from and on the top surface.
Public/Granted literature
- US12237414B2 Source/drain features with improved strain properties Public/Granted day:2025-02-25
Information query
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