A memory device and an operation method thereof are provided. The memory device comprises: a memory array including a plurality of memory cells; a first local signal line decoder coupled to the memory array; a second local signal line decoder coupled to the memory array; and a controller coupled to and controlling the memory array, the first local signal line decoder and the second local signal line decoder, wherein in programming, a threshold voltage distribution of the memory cells is lower than a read voltage; and in erase, the threshold voltage distribution of the memory cells is higher than the read voltage.