Invention Application
- Patent Title: HYBRID CONDUCTIVE STRUCTURES
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Application No.: US17320553Application Date: 2021-05-14
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Publication No.: US20220367660A1Publication Date: 2022-11-17
- Inventor: Shuen-Shin Liang , Chih-Chien Chi , Chien-Shun Liao , Keng-Chu Lin , Kai-Ting Huang , Sung-Li Wang , Yi-Ying Liu , Chia-Hung Chu , Hsu-Kai Chang , Cheng-Wei Chang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L29/45
- IPC: H01L29/45 ; H01L23/535 ; H01L23/532 ; H01L29/78 ; H01L21/768

Abstract:
The present disclosure describes a method for forming metallization layers that include a ruthenium metal liner and a cobalt metal fill. The method includes depositing a first dielectric on a substrate having a gate structure and source/drain (S/D) structures, forming an opening in the first dielectric to expose the S/D structures, and depositing a ruthenium metal on bottom and sidewall surfaces of the opening. The method further includes depositing a cobalt metal on the ruthenium metal to fill the opening, reflowing the cobalt metal, and planarizing the cobalt and ruthenium metals to form S/D conductive structures with a top surface coplanar with a top surface of the first dielectric.
Public/Granted literature
- US11894437B2 Hybrid conductive structures Public/Granted day:2024-02-06
Information query
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