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公开(公告)号:US20220367660A1
公开(公告)日:2022-11-17
申请号:US17320553
申请日:2021-05-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shuen-Shin Liang , Chih-Chien Chi , Chien-Shun Liao , Keng-Chu Lin , Kai-Ting Huang , Sung-Li Wang , Yi-Ying Liu , Chia-Hung Chu , Hsu-Kai Chang , Cheng-Wei Chang
IPC: H01L29/45 , H01L23/535 , H01L23/532 , H01L29/78 , H01L21/768
Abstract: The present disclosure describes a method for forming metallization layers that include a ruthenium metal liner and a cobalt metal fill. The method includes depositing a first dielectric on a substrate having a gate structure and source/drain (S/D) structures, forming an opening in the first dielectric to expose the S/D structures, and depositing a ruthenium metal on bottom and sidewall surfaces of the opening. The method further includes depositing a cobalt metal on the ruthenium metal to fill the opening, reflowing the cobalt metal, and planarizing the cobalt and ruthenium metals to form S/D conductive structures with a top surface coplanar with a top surface of the first dielectric.
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公开(公告)号:US11894437B2
公开(公告)日:2024-02-06
申请号:US17320553
申请日:2021-05-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shuen-Shin Liang , Chih-Chien Chi , Chien-Shun Liao , Keng-Chu Lin , Kai-Ting Huang , Sung-Li Wang , Yi-Ying Liu , Chia-Hung Chu , Hsu-Kai Chang , Cheng-Wei Chang
IPC: H01L29/45 , H01L23/535 , H01L23/532 , H01L29/78 , H01L21/768
CPC classification number: H01L29/45 , H01L21/7684 , H01L21/76805 , H01L21/76843 , H01L21/76882 , H01L21/76895 , H01L23/535 , H01L23/53209 , H01L29/7851
Abstract: The present disclosure describes a method for forming metallization layers that include a ruthenium metal liner and a cobalt metal fill. The method includes depositing a first dielectric on a substrate having a gate structure and source/drain (S/D) structures, forming an opening in the first dielectric to expose the S/D structures, and depositing a ruthenium metal on bottom and sidewall surfaces of the opening. The method further includes depositing a cobalt metal on the ruthenium metal to fill the opening, reflowing the cobalt metal, and planarizing the cobalt and ruthenium metals to form S/D conductive structures with a top surface coplanar with a top surface of the first dielectric.
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