Invention Application
- Patent Title: LOGIC CELL FOR PROGRAMMABLE GATE ARRAY
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Application No.: US17529522Application Date: 2021-11-18
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Publication No.: US20220376693A1Publication Date: 2022-11-24
- Inventor: Jonathan W. Greene , Marcel Derevlean
- Applicant: Microchip Technology Inc.
- Applicant Address: US AZ Chandler
- Assignee: Microchip Technology Inc.
- Current Assignee: Microchip Technology Inc.
- Current Assignee Address: US AZ Chandler
- Main IPC: H03K19/17728
- IPC: H03K19/17728 ; H03K19/21 ; H03K19/17736

Abstract:
A logic cell for a programmable logic integrated circuit apparatus includes a K-input lookup table (LUT) circuit having a primary output Y, wherein Y is any function of K inputs, and at least one additional output (F). A carry circuit receives the outputs of the LUT and a carry-in input CI. The carry circuit generates a sum output S and a carry-out output CO. The carry circuit can be configured to provide S=CI and select CO from the set {0, 1, F}. The carry circuit can alternatively be configured to provide S=EXOR(Y, CI) and select CO from the set {0, 1, F}. The carry circuit can alternatively be configured to provide S=EXOR(Y, CI) and CO=CI if Y=q or to select CO from the set {0, 1, F} if Y≠q, where q is a pre-determined value (e.g., such as 0 or 1).
Public/Granted literature
- US11671099B2 Logic cell for programmable gate array Public/Granted day:2023-06-06
Information query
IPC分类: