Invention Publication
- Patent Title: ADAPTIVE GAIN FOR COMPENSATION IN A DIGITAL VOLTAGE REGULATOR
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Application No.: US17540046Application Date: 2021-12-01
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Publication No.: US20230168705A1Publication Date: 2023-06-01
- Inventor: Sergio Carlo Rodriguez , Cary D, Renzema , Amit K. Jain , Po-Cheng Chen , Fabrice Paillet , Anand Ramasundar , James Keith Hodgson
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G05F1/577
- IPC: G05F1/577

Abstract:
Embodiments herein relate to a feedback loop in a digital voltage regulator for controlling an output voltage. To avoid instability at light current loads, a gain of the loop is reduced as a power gate code indicates a reduced number of branches in set of current sources are enabled. In an example implementation, the code is classified into one range of a number of ranges, and the gain is set based on the one range. The gain can decrease each time the code enters a lower range, as indicated by the code crossing a threshold or predetermined value. For example, the gain can decrease by half each time the code enters a lower range.
Information query
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