- 专利标题: GATE CUT GRID ACROSS INTEGRATED CIRCUIT
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申请号: US17682037申请日: 2022-02-28
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公开(公告)号: US20230275085A1公开(公告)日: 2023-08-31
- 发明人: Leonard P. Guler , Sukru Yemenicioglu , Mohit K. Haran , Shengsi Liu , Robert Joachim , Dan S. Lavric , Stephen M. Cea
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 主分类号: H01L27/088
- IPC分类号: H01L27/088 ; H01L29/06 ; H01L29/423 ; H01L29/786 ; H01L29/417
摘要:
Techniques are provided herein to form an integrated circuit having a grid of gate cut structures such that a gate cut structure exists between pairs of semiconductor devices. In an example, neighboring semiconductor devices each include a semiconductor region extending between a source region and a drain region, and a gate structure extending over the semiconductor regions of the neighboring semiconductor devices. A gate cut structure is present between each pair of neighboring semiconductor devices thus interrupting the gate structure and isolating the gate of one semiconductor device from the gate of the other semiconductor device. Each of the gate cut structures may be formed at the same time in a grid-like pattern across the integrated circuit (or a portion thereof). Sidewall spacer structures on the sidewalls of the gate structure wrap around ends of each gate structure to form a given gate cut structure.
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