A method for producing a 3D semiconductor device including: providing a first level including a first single crystal layer; forming a first metal layer on top of the first level; forming a second metal layer on top of the first metal layer; forming at least one second level above the second metal layer; performing a first lithography step on the second level; forming a third level on top of the second level; performing processing steps to form first memory cells within the second level and form second memory cells within the third level, where the first memory cells include at least one second transistor, and the second memory cells include at least one third transistor; and then at performing at least one deposition step which deposits gate electrodes for both the second and the third transistors, and forming at least four independent memory arrays.