Invention Application
- Patent Title: PACKAGE COMPRISING A SUBSTRATE WITH A VIA INTERCONNECT COUPLED TO A TRACE INTERCONNECT
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Application No.: US17476383Application Date: 2021-09-15
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Publication No.: US20230078231A1Publication Date: 2023-03-16
- Inventor: Kun FANG , Jaehyun YEON , Suhyung HWANG , Hyunchul CHO
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/48
Abstract:
A package that includes a substrate and an integrated device coupled to the substrate. The substrate includes at least one dielectric layer and a plurality of interconnects comprising a first via interconnect and a first trace interconnect, wherein the first via interconnect is directly coupled to the first trace interconnect. The first via interconnect is coupled to the first trace interconnect without an intervening pad interconnect between the first via interconnect and the first trace interconnect.
Public/Granted literature
Information query
IPC分类:
