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公开(公告)号:US20240339414A1
公开(公告)日:2024-10-10
申请号:US18296843
申请日:2023-04-06
Applicant: QUALCOMM Incorporated
Inventor: Jaehyun YEON , Suhyung HWANG , Omar James BCHIR , Hyunchul CHO , Yeoil PARK
IPC: H01L23/538 , H01L21/48
CPC classification number: H01L23/5389 , H01L21/4857 , H01L23/5383 , H01L23/5386
Abstract: A hybrid core substrate with embedded components, and methods for making the same, are disclosed. In an aspect a hybrid core substrate comprises a rigid core, a first laminate layer structure disposed above and mounted to the top surface of the rigid core and having a cavity in which a first component is embedded, and a second laminate layer structure disposed above and mounted to a top surface of the first laminate layer structure and having at least one electrical connection to the first laminate layer structure and at least one electrical connection to the first component, a first plurality of contacts disposed on the top surface of the second laminate layer structure and electrically connected to the second laminate layer structure. In some aspects, at least one contact is electrically connected to the embedded component.
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公开(公告)号:US20230093681A1
公开(公告)日:2023-03-23
申请号:US17479691
申请日:2021-09-20
Applicant: QUALCOMM Incorporated
Inventor: Hyunchul CHO , Kun FANG , Jaehyun YEON , Suhyung HWANG
IPC: H01L21/768 , H01L21/48 , H01L21/56 , H01L23/498 , H01L23/00
Abstract: A package that includes a substrate, a first integrated device coupled to a first surface of the substrate, and a second integrated device coupled to a second surface of the substrate. The substrate includes at least one dielectric layer, a first plurality of high-density interconnects located in the at least one dielectric layer and through a first surface of the at least one dielectric layer; a second plurality of high-density interconnects located in the at least one dielectric.
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公开(公告)号:US20230078231A1
公开(公告)日:2023-03-16
申请号:US17476383
申请日:2021-09-15
Applicant: QUALCOMM Incorporated
Inventor: Kun FANG , Jaehyun YEON , Suhyung HWANG , Hyunchul CHO
IPC: H01L23/498 , H01L21/48
Abstract: A package that includes a substrate and an integrated device coupled to the substrate. The substrate includes at least one dielectric layer and a plurality of interconnects comprising a first via interconnect and a first trace interconnect, wherein the first via interconnect is directly coupled to the first trace interconnect. The first via interconnect is coupled to the first trace interconnect without an intervening pad interconnect between the first via interconnect and the first trace interconnect.
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