A semiconductor memory device includes first and second word lines, a bit line, a source line, and a memory cell. The memory cell includes a spin-orbit torque (SOT) pattern having a first end electrically coupled to the source line, a magnetic tunnel junction pattern extending adjacent the SOT pattern, and a read transistor having a first current carrying terminal electrically coupled to a first end of the magnetic tunnel junction pattern, a second current carrying terminal electrically coupled to the bit line, and a gate terminal electrically coupled to the first word line. The memory cell also includes a write transistor having a first current carrying terminal electrically coupled to a second end of the SOT pattern, a second current carrying terminal electrically coupled to the first end of the magnetic tunnel junction pattern, and a gate terminal electrically coupled to the second word line.