公开(公告)号：US20230134533A1

公开(公告)日：2023-05-04

申请号：US17817435

申请日：2022-08-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongsun Park ,  Yunho Jang ,  Seonggeon Park

IPC: H01L27/22 ,  H01L43/04 ,  H01L43/06

Abstract: A semiconductor memory device includes first and second word lines, a bit line, a source line, and a memory cell. The memory cell includes a spin-orbit torque (SOT) pattern having a first end electrically coupled to the source line, a magnetic tunnel junction pattern extending adjacent the SOT pattern, and a read transistor having a first current carrying terminal electrically coupled to a first end of the magnetic tunnel junction pattern, a second current carrying terminal electrically coupled to the bit line, and a gate terminal electrically coupled to the first word line. The memory cell also includes a write transistor having a first current carrying terminal electrically coupled to a second end of the SOT pattern, a second current carrying terminal electrically coupled to the first end of the magnetic tunnel junction pattern, and a gate terminal electrically coupled to the second word line.

公开(公告)号：US20240365678A1

公开(公告)日：2024-10-31

申请号：US18502715

申请日：2023-11-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Woong Kim ,  Kwang Seok Kim ,  Seonggeon Park ,  Jeongchun Ryu

IPC: H10N50/20 ,  H10B61/00 ,  H10N50/01 ,  H10N50/85

CPC classification number: H10N50/20 ,  H10B61/00 ,  H10N50/01 ,  H10N50/85

Abstract: A magnetic memory device includes: (i) a reference magnetic pattern and a free magnetic pattern stacked in vertical alignment relative to a surface of a substrate, and (ii) a tunnel barrier pattern extending between the reference magnetic pattern and the free magnetic pattern. The reference magnetic pattern includes: a first pinned pattern, and a second pinned pattern extending between the first pinned pattern and the tunnel barrier pattern, and an exchange coupling pattern, which extends between the first pinned pattern and the second pinned pattern and antiferromagnetically couples the first pinned pattern and the second pinned pattern to each other. The first pinned pattern includes a first magnetic pattern and a second magnetic pattern extending between the first magnetic pattern and the exchange coupling pattern. One of the first magnetic pattern and the second magnetic pattern includes: cobalt, platinum, and a first non-magnetic element comprising at least one of Nb, Cr, Mo, W, Zr, Hf, and Ti, whereas the other one of the first magnetic pattern and the second magnetic pattern includes cobalt.

公开(公告)号：US20140078812A1

公开(公告)日：2014-03-20

申请号：US14021412

申请日：2013-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunsu Ju ,  Min Kyu Yang ,  Eunmi Kim ,  Seonggeon Park ,  Ingyu Baek

IPC: G11C13/00

CPC classification number: G11C13/0002 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2213/15 ,  G11C2213/32 ,  G11C2213/76

Abstract: A method of operating a resistive non-volatile memory can be provided by applying a forming voltage across first and second electrodes of a selected memory cell in the variable resistance non-volatile memory device during an operation to the selected memory cell. The forming voltage can be a voltage level that is limited to less than a breakdown voltage of an insulation film included in selected memory cell between a variable resistance film and one of first electrode. Related devices and materials are also disclosed.

Abstract translation: 可以通过在对所选择的存储器单元的操作期间将可选择的电阻非易失性存储器件中的所选存储单元的第一和第二电极上的形成电压施加到电阻性非易失性存储器的操作方法来提供。 形成电压可以是被限制为小于可变电阻膜和第一电极中的一个之间的所选存储单元中包括的绝缘膜的击穿电压的电压电平。 还公开了相关的装置和材料。

公开(公告)号：US12245518B2

公开(公告)日：2025-03-04

申请号：US17490353

申请日：2021-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ung Hwan Pi ,  Seonggeon Park ,  Jeong-Heon Park ,  Sung Chul Lee

IPC: H10N50/80 ,  H01F10/32 ,  H10B61/00 ,  H10N50/85

Abstract: A magnetic memory device includes a first magnetic layer extending in a first direction, a pinned layer on the first magnetic layer, and a second magnetic layer vertically overlapping with the pinned layer with the first magnetic layer interposed between the pinned layer and the second magnetic layer. The first magnetic layer includes, a plurality of magnetic domains arranged in the first direction, and at least one magnetic domain wall between the plurality of magnetic domains, and a magnetization direction of the second magnetic layer is substantially parallel to a top surface of the first magnetic layer.

公开(公告)号：US12150387B2

公开(公告)日：2024-11-19

申请号：US17982955

申请日：2022-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwangseok Kim ,  Seonggeon Park ,  Seungjae Lee ,  Naoki Hase

IPC: H10N50/10 ,  H10B61/00 ,  H10N50/80 ,  H10N50/85

Abstract: Provided are a magnetic tunneling junction device having more stable perpendicular magnetic anisotropy (PMA) and/or increased operating speed, and/or a memory device including the magnetic tunneling junction device. The magnetic tunneling junction device includes a free layer having a first surface and a second surface opposite the first surface; a pinned layer facing the first surface of the free layer; a first oxide layer between the pinned layer and the free layer; and a second oxide layer on the second surface of the free layer. The free layer includes a magnetic material X doped with a non-magnetic metal/ The second oxide layer includes ZOx which is an oxide of a metal Z. An oxygen affinity of the metal Z is greater than an oxygen affinity of the non-magnetic metal X.

公开(公告)号：US12052930B2

公开(公告)日：2024-07-30

申请号：US17701056

申请日：2022-03-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwangseok Kim ,  Seonggeon Park ,  Seungjae Lee ,  Naoki Hase

IPC: H10N50/10 ,  G11C11/16 ,  H01F10/32 ,  H10B61/00 ,  H10N50/85

CPC classification number: H10N50/10 ,  G11C11/161 ,  H01F10/3286 ,  H10B61/00 ,  H10N50/85

Abstract: Provided are a magnetic tunneling junction device having more stable perpendicular magnetic anisotropy (PMA) and/or increased operating speed, and/or a memory device including the magnetic tunneling junction device. The magnetic tunneling junction device includes a free layer having a first surface and a second surface opposite the first surface; a pinned layer facing the first surface of the free layer; a first oxide layer between the pinned layer and the free layer; and a second oxide layer on the second surface of the free layer. The free layer includes a magnetic material X doped with a non-magnetic metal/ The second oxide layer includes ZOx which is an oxide of a metal Z. An oxygen affinity of the metal Z is greater than an oxygen affinity of the non-magnetic metal X.

公开(公告)号：US09378811B2

公开(公告)日：2016-06-28

申请号：US14021412

申请日：2013-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunsu Ju ,  Min Kyu Yang ,  Eunmi Kim ,  Seonggeon Park ,  Ingyu Baek

IPC: G11C13/00

CPC classification number: G11C13/0002 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2213/15 ,  G11C2213/32 ,  G11C2213/76

Abstract: A method of operating a resistive non-volatile memory can be provided by applying a forming voltage across first and second electrodes of a selected memory cell in the variable resistance non-volatile memory device during an operation to the selected memory cell. The forming voltage can be a voltage level that is limited to less than a breakdown voltage of an insulation film included in selected memory cell between a variable resistance film and one of first electrode. Related devices and materials are also disclosed.

Abstract translation: 可以通过在对所选择的存储器单元的操作期间将可选择的电阻非易失性存储器件中的所选存储单元的第一和第二电极上的形成电压施加到电阻性非易失性存储器的操作方法来提供。 形成电压可以是被限制为小于可变电阻膜和第一电极中的一个之间的选定存储单元中包括的绝缘膜的击穿电压的电压电平。 还公开了相关的装置和材料。