Invention Publication

STACKED FET SRAM
Abstract:
A semiconductor device is provided that includes at least one stacked FET device including two top transistors stacked over a single bottom transistor. The at least one stacked FET includes a full gate cut structure that is used to separate different device areas from each other, a top gate cut structure that used to separate the two top transistors, and a bottom gate cut structure that is used to provide the single bottom transistor. The at least one FET device can be used to provide a SRAM containing six transistors.
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