Invention Publication
- Patent Title: POWER MOSFET DEVICE WITH ISOLATED GATE STRUCTURE AND MANUFACTURING PROCESS THEREOF
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Application No.: US18345767Application Date: 2023-06-30
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Publication No.: US20240014286A1Publication Date: 2024-01-11
- Inventor: Mario Giuseppe SAGGIO , Cateno Marco CAMALLERI , Alfio GUARNERA
- Applicant: STMICROELECTRONICS S.r.l.
- Applicant Address: IT Agrate Brianza
- Assignee: STMICROELECTRONICS S.r.l.
- Current Assignee: STMICROELECTRONICS S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Priority: IT 2022000014566 2022.07.11
- Main IPC: H01L29/49
- IPC: H01L29/49 ; H01L29/16 ; H01L29/78 ; H01L21/04 ; H01L29/66

Abstract:
A power MOSFET device includes a semiconductor body having a first main surface. The semiconductor body includes an active area facing the first main surface. The power MOSFET device includes an isolated-gate structure, which extends over the active area and includes a gate-oxide layer, which is made of insulating material and extends over the first main surface, and a gate region buried in the gate-oxide layer so as to be electrically insulated from the semiconductor body. The gate region includes a gate layer of polysilicon and at least one first silicide electrical-modulation region and one second silicide electrical-modulation region, which extend in the gate layer so as to face a top surface of the gate layer and to be arranged alongside one another and spaced apart from one another in a first plane.
Information query
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