公开(公告)号：US20220246729A1

公开(公告)日：2022-08-04

申请号：US17565165

申请日：2021-12-29

Applicant: STMicroelectronics S.r.l.

Inventor： Mario Giuseppe SAGGIO ,  Edoardo ZANETTI ,  Alessia Maria FRAZZETTO ,  Alfio GUARNERA ,  Cateno Marco CAMALLERI ,  Antonio Giuseppe GRIMALDI

IPC: H01L29/16 ,  H01L21/04 ,  H01L29/10 ,  H01L21/265

Abstract: A vertical conduction MOSFET device includes a body of silicon carbide, which has a first type of conductivity and a face. A superficial body region of a second type of conductivity has a first doping level and extends into the body to a first depth , and has a first width. A source region of the first type of conductivity extends into the superficial body region to a second depth, and has a second width. The second depth is smaller than the first depth and the second width is smaller than the first width. A deep body region of the second type of conductivity has a second doping level and extends into the body, at a distance from the face of the body and in direct electrical contact with the superficial body region, and the second doping level is higher than the first doping level.

公开(公告)号：US20240071912A1

公开(公告)日：2024-02-29

申请号：US18450789

申请日：2023-08-16

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Laura Letizia SCALIA ,  Cateno Marco CAMALLERI ,  Edoardo ZANETTI ,  Alfio RUSSO

IPC: H01L23/525 ,  H01L23/29 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L23/5256 ,  H01L23/293 ,  H01L29/1608 ,  H01L29/66666 ,  H01L29/7827

Abstract: SiC-based MOSFET electronic device comprising: a solid body; a gate terminal, extending into the solid body; a conductive path, extending at a first side of the solid body, configured to be electrically couplable to a generator of a biasing voltage; a protection element of a solid-state material, coupled to the gate terminal and to the conductive path, the protection element forming an electronic connection between the gate terminal and the conductive path, and being configured to go from the solid state to a melted or gaseous state, interrupting the electrical connection, in response to a leakage current through the protection element greater than a critical threshold; a buried cavity in the solid body accommodating, at least in part, the protection element.

公开(公告)号：US20240113179A1

公开(公告)日：2024-04-04

申请号：US18471219

申请日：2023-09-20

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Laura Letizia SCALIA ,  Cateno Marco CAMALLERI ,  Leonardo FRAGAPANE

IPC: H01L29/417 ,  H01L29/06 ,  H01L29/08 ,  H01L29/16 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/41741 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/1608 ,  H01L29/401 ,  H01L29/66068 ,  H01L29/7802

Abstract: Electronic device, comprising: a semiconductor body having a surface; a body region in the semiconductor body, extending along a main direction parallel to the surface of the semiconductor body; and a source region in the body region, extending along the main direction. The electronic device has, at the body and source regions, a first and a second electrical contact region alternating with each other along the main direction, wherein the first electrical contact region exposes the body region, and the second electrical contact region exposes the source region. The electronic device further comprises an electrical connection layer extending with electrical continuity longitudinally to the body and source regions, in electrical connection with the first and the second electrical contact regions.

公开(公告)号：US20220262913A1

公开(公告)日：2022-08-18

申请号：US17669239

申请日：2022-02-10

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Mario Giuseppe SAGGIO ,  Alfio GUARNERA ,  Cateno Marco CAMALLERI

IPC: H01L29/423 ,  H01L29/43 ,  H01L29/66 ,  H01L29/16 ,  H01L29/78 ,  H01L29/40

Abstract: A vertical-conduction MOSFET device formed in a body of silicon carbide having a first and a second face and a peripheral zone. A drain region, of a first conductivity type, extends in the body between the two faces. A body region, of a second conductivity type, extends in the body from the first face, and a source region, having the first conductivity type, extends to the inside of the body region from the first face of the body. An insulated gate region extends on the first face of the body and comprises a gate conductive region. An annular connection region, of conductive material, is formed within a surface edge structure extending on the first face of the body, in the peripheral zone. The gate conductive region and the annular connection region are formed by a silicon layer and by a metal silicide layer overlying the silicon layer.

公开(公告)号：US20240079237A1

公开(公告)日：2024-03-07

申请号：US18363349

申请日：2023-08-01

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Mario Giuseppe SAGGIO ,  Cateno Marco CAMALLERI ,  Gabriele BELLOCCHI ,  Simone RASCUNA'

IPC: H01L21/04 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L21/0485 ,  H01L29/401 ,  H01L29/66068

Abstract: Method of manufacturing an electronic device, comprising forming an ohmic contact at an implanted region of a semiconductor body. Forming the ohmic contact provides for performing a high-temperature thermal process for allowing a reaction between a metal material and the material of the semiconductor body, for forming a silicide of the metal material. The step of forming the ohmic contact is performed prior to a step of forming one or more electrical structures which include materials that may be damaged by the high temperature of the thermal process of forming the silicide.

公开(公告)号：US20240014286A1

公开(公告)日：2024-01-11

申请号：US18345767

申请日：2023-06-30

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Mario Giuseppe SAGGIO ,  Cateno Marco CAMALLERI ,  Alfio GUARNERA

IPC: H01L29/49 ,  H01L29/16 ,  H01L29/78 ,  H01L21/04 ,  H01L29/66

CPC classification number: H01L29/4933 ,  H01L29/1608 ,  H01L29/7802 ,  H01L21/049 ,  H01L29/66068

Abstract: A power MOSFET device includes a semiconductor body having a first main surface. The semiconductor body includes an active area facing the first main surface. The power MOSFET device includes an isolated-gate structure, which extends over the active area and includes a gate-oxide layer, which is made of insulating material and extends over the first main surface, and a gate region buried in the gate-oxide layer so as to be electrically insulated from the semiconductor body. The gate region includes a gate layer of polysilicon and at least one first silicide electrical-modulation region and one second silicide electrical-modulation region, which extend in the gate layer so as to face a top surface of the gate layer and to be arranged alongside one another and spaced apart from one another in a first plane.