Invention Publication
- Patent Title: PLUG IN A METAL LAYER
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Application No.: US17958288Application Date: 2022-09-30
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Publication No.: US20240113017A1Publication Date: 2024-04-04
- Inventor: Leonard P. GULER , Gurpreet SINGH , Charles H. WALLACE , Tahir GHANI
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L21/768

Abstract:
Embodiments described herein may be related to apparatuses, processes, systems, and/or techniques for forming a plug within a metal layer of a semiconductor device, where the plug is formed within a cavity that is created through the metal layer. The plug may extend through the metal layer and into a layer below the metal layer, which may be a layer that includes a dielectric and one or more electrical routing features. The plug may include an electrical insulator material. The cavity may be formed by placing a mask above the metal layer and performing an etch through the metal layer subsequently filled with a dielectric, where the plug will be tapered and wider at the top of the plug and become narrower as the plug continues through the metal layer and reaches the layer below the metal layer. Other embodiments may be described and/or claimed.
Information query
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