Invention Publication
- Patent Title: MEMORY DEVICE
-
Application No.: US18382075Application Date: 2023-10-20
-
Publication No.: US20240147687A1Publication Date: 2024-05-02
- Inventor: Takanori MATSUZAKI , Hiroki INOUE , Yuki OKAMOTO
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi
- Priority: JP 22172931 2022.10.28
- Main IPC: H10B12/00
- IPC: H10B12/00

Abstract:
A memory device that can be highly integrated is provided. The memory device includes a first transistor and a second transistor in a memory cell, and small-area vertical transistors each including a channel formation region on a side surface of an opening portion provided in an insulating layer are used as the two transistors. The memory cell includes a conductor having a function of a gate electrode of the first transistor and a function of one of a source electrode and a drain electrode of the second transistor. The memory cells are placed in a staggered arrangement, so that the memory device can be highly integrated.
Information query