Invention Publication
- Patent Title: MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM
-
Application No.: US18419895Application Date: 2024-01-23
-
Publication No.: US20240160359A1Publication Date: 2024-05-16
- Inventor: Kishore Kumar Muchherla , Jonathan S. Parry , Nicola Ciocchini , Animesh Roy Chowdhury , Akira Goda , Jung Sheng Hoei , Niccolo’ Righetti , Ugo Russo
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
A system includes a memory device including multiple memory cells and a processing device operatively coupled to the memory device. The processing device is to receive a first read command at a first time. The processing device is further to receive a second read command at a second time. The processing device is further to determine that the first read command and the second read command are directed to an at least partially same set of memory cells of the plurality of memory cells. The processing device is further to perform a media management operation with respect to the at least partially same set of memory cells.
Information query