Invention Publication
- Patent Title: READ DISTURB TRACKING AMONG MULTIPLE ERASE BLOCKS COUPLED TO A SAME STRING
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Application No.: US18386760Application Date: 2023-11-03
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Publication No.: US20240168879A1Publication Date: 2024-05-23
- Inventor: Akira Goda , Kishore K. Muchherla , Shyam Sunder Raghunathan , Leo Raimondo , Jung Sheng Hoei , Xiangang Luo , Ashutosh Malshe , Jianmin Huang
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G06F12/02
- IPC: G06F12/02

Abstract:
An apparatus can comprise a memory array comprising a plurality of strings of memory cells each comprising: a first group of memory cells coupled to a first group of access lines and corresponding to a first erase block; and a second group of memory cells coupled to a second group of access lines and corresponding to a second erase block. A controller is configured to determine a cumulative amount of read disturb stress experienced by the first erase block by monitoring read disturb stress experienced by the first erase block due to: read operations performed on the first erase block; read operations performed on the second erase block; and program verify operations performed on the second erase block. The controller can perform an action on the first erase block responsive to the cumulative amount of read disturb stress experienced by the first erase block meeting a criteria.
Information query