Invention Publication
- Patent Title: SEMICONDUCTOR DEVICE
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Application No.: US18483737Application Date: 2023-10-10
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Publication No.: US20240178222A1Publication Date: 2024-05-30
- Inventor: Naohito SUZUMURA , Eiji TSUKUDA , Yoshiki YAMAMOTO
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Priority: JP 22187154 2022.11.24
- Main IPC: H01L27/06
- IPC: H01L27/06 ; H01L29/04 ; H01L29/36

Abstract:
A resistance element is comprised of a first semiconductor layer of an SOI substrate and a second semiconductor layer formed on the first semiconductor layer. The second semiconductor layer has first and second semiconductor portions spaced apart from each other. The first semiconductor layer has a first region on which the first semiconductor portion is formed, a second region on which the second semiconductor portion is formed, and a third region on which no epitaxial semiconductor layer is formed. Each of the first region and the second region further has a low concentration region located next to the third region. An impurity concentration of the low concentration region is lower than an impurity concentration of the third region. Each semiconductor portion has a middle concentration region located on the low concentration region. An impurity concentration of the middle concentration region is higher than that of the low concentration region.
Information query
IPC分类: