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    SEMICONDUCTOR DEVICE
    1.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20150235943A1

    公开(公告)日：2015-08-20

    申请号：US14701541

    申请日：2015-05-01

    Applicant: Renesas Electronics Corporation

    Inventor： Naohito SUZUMURA ,  Yoshihiro OKA

    IPC: H01L23/522 ,  H01L23/532

    CPC classification number: H01L23/5226 ,  H01L21/768 ,  H01L21/76807 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76835 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L23/538 ,  H01L23/5384 ,  H01L24/05 ,  H01L2221/1036 ,  H01L2221/1047 ,  H01L2224/02166 ,  H01L2224/05556 ,  H01L2924/1306 ,  H01L2924/00

    Abstract: A semiconductor device is provided in which reliability of the semiconductor device is improved by improving an EM characteristic, a TDDB characteristic, and a withstand voltage characteristic of the semiconductor device. An average diameter of first vacancies in a lower insulating layer which configures an interlayer insulating film of a porous low-k film for embedding a wiring therein, is made smaller than an average diameter of second vacancies in an upper insulating layer, and thereby an elastic modulus is increased in the lower insulating layer. Further, a side wall insulating layer which is a dense layer including the first vacancies having an average diameter smaller than the second vacancies is formed on the surface of the interlayer insulating film exposed on a side wall of a wiring trench.

    Abstract translation: 提供一种通过改善半导体器件的EM特性，TDDB特性和耐电压特性来提高半导体器件的可靠性的半导体器件。 使构成用于在其中嵌入布线的多孔低k膜的层间绝缘膜的下绝缘层中的第一空位的平均直径小于上绝缘层中的第二空位的平均直径，从而弹性 下绝缘层的模量增加。 此外，在布线沟槽的侧壁上暴露的层间绝缘膜的表面上形成作为包含平均直径小于第二空位的第一空位的致密层的侧壁绝缘层。

    SEMICONDUCTOR DEVICE
    4.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240178222A1

    公开(公告)日：2024-05-30

    申请号：US18483737

    申请日：2023-10-10

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Naohito SUZUMURA ,  Eiji TSUKUDA ,  Yoshiki YAMAMOTO

    IPC: H01L27/06 ,  H01L29/04 ,  H01L29/36

    CPC classification number: H01L27/0629 ,  H01L29/04 ,  H01L29/36 ,  H01L29/665

    Abstract: A resistance element is comprised of a first semiconductor layer of an SOI substrate and a second semiconductor layer formed on the first semiconductor layer. The second semiconductor layer has first and second semiconductor portions spaced apart from each other. The first semiconductor layer has a first region on which the first semiconductor portion is formed, a second region on which the second semiconductor portion is formed, and a third region on which no epitaxial semiconductor layer is formed. Each of the first region and the second region further has a low concentration region located next to the third region. An impurity concentration of the low concentration region is lower than an impurity concentration of the third region. Each semiconductor portion has a middle concentration region located on the low concentration region. An impurity concentration of the middle concentration region is higher than that of the low concentration region.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    5.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20200043857A1

    公开(公告)日：2020-02-06

    申请号：US16521090

    申请日：2019-07-24

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Naohito SUZUMURA ,  Kazuyuki OMORI

    IPC: H01L23/532 ,  H01L21/768

    Abstract: In the semiconductor device, a first defect formation preventing film is formed on the first wiring side, and a second defect formation preventing film is formed on the second wiring side. when a ratio of an infrared absorption intensity corresponding to a bond between silicon and hydrogen to an infrared absorption intensity corresponding to a bond between silicon and oxygen is defined as an abundance ratio, the abundance ratio in the first defect formation preventing film is smaller than the abundance ratio in the second interlayer insulating film. The abundance ratio in the second defect formation preventing film is smaller than the abundance ratio in the second interlayer insulating film.

    SEMICONDUCTOR DEVICE
    7.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20230343701A1

    公开(公告)日：2023-10-26

    申请号：US18174932

    申请日：2023-02-27

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Nobuhito SHIRAISHI ,  Naohito SUZUMURA

    IPC: H01L23/522 ,  H01C7/00 ,  H01L23/532 ,  H01L21/768 ,  H01C17/12

    CPC classification number: H01L23/5228 ,  H01C7/006 ,  H01L23/5226 ,  H01L23/53238 ,  H01L21/76832 ,  H01L28/24 ,  H01C17/12

    Abstract: A semiconductor device includes first and second interlayer insulating films, first and second wirings, and a resistor film. The first wiring is disposed on the first interlayer insulating film. The second interlayer insulating film includes a first layer and a second layer. The first layer is disposed on the first interlayer insulating film so as to cover the first wiring. The resistor film is disposed on the first layer. The resistor film contains at least one selected from the group consisting of silicon chromium, silicon chromium into which carbon is introduced, nickel chromium, titanium nitride and tantalum nitride. The second layer is disposed on the first layer so as to cover the resistor film. The second wiring is disposed on the second layer. The resistor film is closer to the first wiring than to the second wiring in a thickness direction of the second interlayer insulating film.

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