Invention Publication
- Patent Title: BUS-OFF ATTACK PREVENTION CIRCUIT
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Application No.: US18526456Application Date: 2023-12-01
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Publication No.: US20240179160A1Publication Date: 2024-05-30
- Inventor: Marcio Rogerio Juliato , Shabbir Ahmed , Santosh Ghosh , Christopher Gutierrez , Manoj R. Sastry
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H04L9/40
- IPC: H04L9/40 ; H04L12/40

Abstract:
Various systems and methods for bus-off attack detection are described herein. An electronic device for bus-off attack detection and prevention includes bus-off prevention circuitry coupled to a protected node on a bus, the bus-off prevention circuitry to: detect a transmitted message from the protected node to the bus; detect a bit mismatch of the transmitted message on the bus; suspend further transmissions from the protected node while the bus is analyzed; determine whether the bit mismatch represents a bus fault or an active attack against the protected node; and signal the protected node indicating whether a fault has occurred.
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