A display panel includes a substrate, a first storage capacitor electrode disposed on the substrate, a buffer layer disposed on the first storage capacitor electrode, an active layer disposed on the buffer layer and including a first area, a second area, and a channel area disposed between the first area and the second area, a gate insulation film disposed on the active layer, a gate electrode disposed on the gate insulation film and overlapping with the channel area, an inter-layer insulation film disposed on the gate electrode, and a metal layer disposed on the inter-layer insulation film, wherein the first area and the second area of the active layer are conductive areas, and wherein a conductive auxiliary layer overlapping with at least a portion of each of the first area and the second area and not overlapping with the channel area is included on the substrate, thereby mitigating the step in the area where the storage capacitor electrodes are disposed to prevent a short circuit.