Invention Application
- Patent Title: SEMICONDUCTOR PACKAGE AND METHOD
-
Application No.: US18590271Application Date: 2024-02-28
-
Publication No.: US20250140667A1Publication Date: 2025-05-01
- Inventor: Chih-Chiang Chang , Hua-Wei Tseng , Ta-Hsuan Lin , Wei-Cheng Wu , Der-Chyang Yeh
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/00 ; H01L23/31 ; H01L23/367 ; H01L23/522 ; H01L25/00 ; H01L25/065 ; H01L25/18

Abstract:
In a semiconductor package having a redistribution structure, two or more semiconductor dies are connected to a first side of the redistribution structure and an encapsulant surrounds the two or more semiconductor dies. An integrated passive device (IPD) is connected on a second side of the redistribution structure. The second side is opposite to the first side and the IPD is electrically coupled to the redistribution structure. An interconnect device is connected on the second side of the redistribution structure and is electrically coupled to the redistribution structure. Two or more external connections are on the second side of the redistribution structure and are electrically coupled to the redistribution structure.
Information query
IPC分类: