Invention Grant
US3609688A Code translator for use in an associative memory system 失效
代码转换器用于相关记忆系统

Code translator for use in an associative memory system
Abstract:
A diode code translator circuit is described in which inhibiting transistors are driven by coded output signals to inhibit concurrent input signals in a predetermined priority pattern. The uninhibited input signals drive an OR gate to provide a transfer signal for gating the coded output signals. A system for cascading the code translator circuits of this invention is also shown in which the transfer signals from a plurality of the code translator circuits serve as input signals to a succeeding stage. The transfer signal from the succeeding stage serves as the gating signal. In this arrangement, the coded output signals from the plurality of code translation circuits are connected in parallel to extend the priority sequence to the cascaded system.
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