Invention Grant
US3819954A Signal level shift compensation in chargetransfer delay line circuits 失效
充电器延迟线电路中的信号电平变换补偿

  • Patent Title: Signal level shift compensation in chargetransfer delay line circuits
  • Patent Title (中): 充电器延迟线电路中的信号电平变换补偿
  • Application No.: US32864273
    Application Date: 1973-02-01
  • Publication No.: US3819954A
    Publication Date: 1974-06-25
  • Inventor: BUTLER WBARRON MKURZ B
  • Applicant: GEN ELECTRIC
  • Assignee: Gen Electric
  • Current Assignee: Gen Electric
  • Priority: US32864273 1973-02-01
  • Main IPC: G11C27/04
  • IPC: G11C27/04 H03K25/02
Signal level shift compensation in chargetransfer delay line circuits
Abstract:
Compensation for undesired shifts in the D.C. voltage level of a signal being propagated through a charge-transfer delay line is provided by compensating stages spaced at regular intervals along the delay line. The compensating stages are preferably transistors of the same type as that used in the delay line and having their source (or drain) electrodes connected to appropriate nodes along the delay line and their gate electrodes supplied from a pulsed source of voltage having controllable voltage amplitude and pulse repetition rate. The drain (or source) electrodes are grounded for shifting the D.C. voltage level in a first polarity voltage direction and are open or connected to a D.C. voltage source for shifting in the opposite polarity voltage direction.
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