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US4424561A Odd/even bank structure for a cache memory 失效
高速缓冲存储器的奇/偶存储体结构

Odd/even bank structure for a cache memory
摘要:
A cache memory for use in a data processing system wherein data words identified by even address numbers are stored separately from data words associated with odd address numbers to enable the simultaneous transfer of two successively addressed data words to or from the cache memory by the transferring of a data word associated with an odd address number and a data word associated with an even address number.
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