发明授权
US4709350A Semiconductor memory using multiple level storage structure 失效
半导体存储器采用多级存储结构

Semiconductor memory using multiple level storage structure
摘要:
In a semiconductor memory for reading and writing of stored charge in an X-Y address system by arranging a plurality of memory cells each including a capacitance element and one MOS-FET in matrix, this invention discloses a semiconductor memory using multiple level storage structure for read and write of at least more than two multi-level data stored in the capacitance elements, by applying a multi-level step voltage to the plate electrode of the capacitance or to the gate electrode of MOS-FET so as to write and read signal charge.
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