发明授权
- 专利标题: Semiconductor memory using multiple level storage structure
- 专利标题(中): 半导体存储器采用多级存储结构
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申请号: US627895申请日: 1984-07-05
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公开(公告)号: US4709350A公开(公告)日: 1987-11-24
- 发明人: Yoshinobu Nakagome , Masakazu Aoki , Masashi Horiguchi , Katsuhiro Shimohigashi , Shinichi Ikenaga
- 申请人: Yoshinobu Nakagome , Masakazu Aoki , Masashi Horiguchi , Katsuhiro Shimohigashi , Shinichi Ikenaga
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX58-120364 19830704
- 主分类号: G11C14/00
- IPC分类号: G11C14/00 ; G11C11/56 ; G11C19/00 ; G11C27/00
摘要:
In a semiconductor memory for reading and writing of stored charge in an X-Y address system by arranging a plurality of memory cells each including a capacitance element and one MOS-FET in matrix, this invention discloses a semiconductor memory using multiple level storage structure for read and write of at least more than two multi-level data stored in the capacitance elements, by applying a multi-level step voltage to the plate electrode of the capacitance or to the gate electrode of MOS-FET so as to write and read signal charge.
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