发明授权
US4731761A Semiconductor memory 失效
半导体存储器

Semiconductor memory
摘要:
A dynamic RAM with static column function comprising a predecoder for predecoding both the row address and the column address to output intermediate signals, a row decoder composed of NOR circuits for selecting one row in response to said intermediate signals, a column decoder composed of NAND circuits for selecting one column in response to said intermediate signals, and a logic inversion circuit for matching the logics for the intermediate signal between the row decoder and the column decoder.
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