发明授权
- 专利标题: Semiconductor integrated circuit device and a method for manufacturing the same
- 专利标题(中): 半导体集成电路器件及其制造方法
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申请号: US159956申请日: 1988-02-24
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公开(公告)号: US4980744A公开(公告)日: 1990-12-25
- 发明人: Atsuo Watanabe , Takahide Ikeda , Kiyoshi Tsukuda , Mitsuru Hirao , Touji Mukai , Tatsuya Kamei
- 申请人: Atsuo Watanabe , Takahide Ikeda , Kiyoshi Tsukuda , Mitsuru Hirao , Touji Mukai , Tatsuya Kamei
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX57-204671 19821124
- 主分类号: H01L27/08
- IPC分类号: H01L27/08 ; H01L21/8249 ; H01L27/06 ; H01L27/118 ; H01L29/68 ; H01L29/78
摘要:
An improved arrangement is provided for forming a bipolar transistor on a substrate with CMOS elements. All of the transistors (i.e., the bipolar, P-MOS and N-MOS) are formed in regions having gradually decreasing impurity concentrations from the surface toward the substrate. In addition, a buried layer is provided under each of the regions of decreasing impurity concentration in which the transistors are formed. These buried layers have a significantly higher impurity concentration than the portion of the region of decreasing impurity concentration which they are respectively adjacent to. Using this arrangement, punch-through is prevented and excellent electrical operating characteristics are provided for both the bipolar transistors and the CMOS elements.
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