发明授权
US5001365A Logic circuit using bipolar and field effect transistor, including a
delayed switching arrangement
失效
使用双极和场效应晶体管的逻辑电路,包括延迟的开关布置
- 专利标题: Logic circuit using bipolar and field effect transistor, including a delayed switching arrangement
- 专利标题(中): 使用双极和场效应晶体管的逻辑电路,包括延迟的开关布置
-
申请号: US325911申请日: 1989-03-20
-
公开(公告)号: US5001365A公开(公告)日: 1991-03-19
- 发明人: Fumio Murabayashi , Yoji Nishio , Shoichi Kotoku , Kozaburo Kurita , Kazuo Kato
- 申请人: Fumio Murabayashi , Yoji Nishio , Shoichi Kotoku , Kozaburo Kurita , Kazuo Kato
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX63-63338 19880318
- 主分类号: H01L29/73
- IPC分类号: H01L29/73 ; H01L21/331 ; H01L21/82 ; H01L27/06 ; H01L27/118 ; H01L29/732 ; H03K17/04 ; H03K17/16 ; H03K17/567 ; H03K19/00 ; H03K19/003 ; H03K19/08 ; H03K19/0944
摘要:
A semiconductor integrated circuit device having a plurality of logic circuits integrated on a semiconductor substrate is provided which can operate with a power source potential difference substantially less than 5 V. The logic circuit includes a bipolar transistor having a base and its collector-emitter current path coupled between a first power source terminal and an output terminal, together with at least one field effect transistor having its gate responsive to an input signal applied to an input terminal and its source-drain current path coupled between the first power source terminal and the base of the bipolar transistor. A semiconductor switch means is also provided which is responsive to the input signal applied to the input terminal for performing ON/OFF operations complementary to the ON/OFF operations of the bipolar transistor and which has a current path between its paired main terminals coupled between the output terminal and the second power source terminal. In order to improve the operating speed, a potential difference reducing element is provided having a current path between its paired main terminals coupled between the first power source terminal and the output terminal for reducing the potential difference, which is present between the first power source terminal and the output terminal based on the base-emitter forward voltage of the bipolar transistor when the bipolar transistor is ON.
信息查询
IPC分类: