发明授权
- 专利标题: Floating point unit interface
- 专利标题(中): 浮点单元接口
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申请号: US797856申请日: 1985-11-14
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公开(公告)号: US5070475A公开(公告)日: 1991-12-03
- 发明人: Kevin B. Normoyle , James M. Guyer , Rainer Vogt , Anthony S. Fong
- 申请人: Kevin B. Normoyle , James M. Guyer , Rainer Vogt , Anthony S. Fong
- 申请人地址: MA Westboro
- 专利权人: Data General Corporation
- 当前专利权人: Data General Corporation
- 当前专利权人地址: MA Westboro
- 主分类号: G06F9/28
- IPC分类号: G06F9/28 ; G06F9/22 ; G06F9/38
摘要:
A data processing system which includes a floating point computation unit (FPU) which interfaces with a central processing unit (CPU) in which the CPU supplies a dispatch control signal to inform the FPU that it is about to execute a floating point macroinstruction and supplies a dispatch address which includes the starting address of the floating point microinstructions therefor during the same operating cycle that the dispatch control signal is supplied. A buffer memory is provided in the FPU to store the starting address of one decoded macroinstruction while a sequence of microinstructions for a previously decoded macroinstruction is being executed by the FPU. When the buffer already has a starting address resident in its buffer the FPU supplies a control signal to prevent the CPU from supplying a further dispatch address until the buffer is empty. Other control signals for synchronizing the CPU and FPU operations and data transfers are also provided.