发明授权
- 专利标题： Process to fabricate a double ring stacked cell structure
- 专利标题（中）： 制造双环堆叠单元结构的工艺
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申请号： US712308申请日： 1991-06-07
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公开(公告)号： US5084405A公开(公告)日： 1992-01-28
- 发明人: Pierre Fazan , Hiang C. Chan , Chuck H. Dennison , Howard E. Rhodes , Yauh-Ching Liu
- 申请人： Pierre Fazan , Hiang C. Chan , Chuck H. Dennison , Howard E. Rhodes , Yauh-Ching Liu
- 申请人地址： ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： ID Boise
- 主分类号： H01L27/04
- IPC分类号： H01L27/04 ; H01L21/02 ; H01L21/822 ; H01L21/8242 ; H01L27/10 ; H01L27/108
摘要：
An existing stacked capacitor fabrication process is modified to construct a three-dimensional stacked capacitor, referred to as a Double Ring Stacked Cell or DRSC. The DRSC design defines a capacitor storage cell that in the present invention is used in a DRAM process. The DRSC is made up of a polysilicon storage node structure having circular polysilicon ringed upper portion centered about a lower portion that makes contact to an active area via a buried contact. The polysilicon storage node structure is overlaid by polysilicon with a dielectric sandwiched in between to form a completed DRSC capacitor. The novel 3-dimensional shaped polysilicon storage node plate having double polysilicon rings, allows substantial capacitor plate surface area of 200% or more to be gained at the storage node over that of a conventional STC.
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