Invention Grant
US5276818A Bus system for information processing system and method of controlling the same 失效
信息处理系统总线系统及其控制方法

Bus system for information processing system and method of controlling
the same
Abstract:
A bus system for an information processing system in which data transfer among plurality of modules is controlled on a common bus. In response to a bus use request from a module, a command is issued for aborting data transfer being performed by another module having a lower priority. The module which is transferring the data responds to the abort command by issuing a signal indicating that a word being transferred is the final word. The data is transferred between a master and a slave through an address bus having a same width as the data in synchronism with a clock supplied from a bus controller.
Information query
Patent Agency Ranking
0/0