发明授权
US5285415A Data counting memory card and reader 失效
数据计数存储卡和读卡器

Data counting memory card and reader
摘要:
An integrated circuit for a passive unit counting memory card comprises p levels (10, 11, 12) of data counting memory. The levels contain corresponding numbers of cases n.sub.1 . . . n.sub.p, a write operation being achieved in a case of an upper rank level each time all the cases of the lower rank level have been enabled, the cases of the lower levels then being erased. The circuit comprises p-1 ghost levels (21, 22) identical to the p-1 upper rank levels of the p counting levels. The addressing logic of the ghost levels is such that the cases of ghost levels are addressed in write phase simultaneously with the cases of the corresponding counting levels and, after a write phase, are addressed in erase phase simultaneously with the cases of the levels of lower rank than the one that has just been enabled.
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