发明授权
US5403776A Process of using a jig to align and mount terminal conductors to a
semiconductor plastic package
失效
使用夹具将端子导体对齐并安装到半导体塑料封装的工艺
- 专利标题： Process of using a jig to align and mount terminal conductors to a semiconductor plastic package
- 专利标题（中）： 使用夹具将端子导体对齐并安装到半导体塑料封装的工艺
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申请号： US152239申请日： 1993-11-16
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公开(公告)号： US5403776A公开(公告)日： 1995-04-04
- 发明人: Kazuto Tsuji , Tetsuya Hiraoka , Tsuyoshi Aoki , Junichi Kasai
- 申请人： Kazuto Tsuji , Tetsuya Hiraoka , Tsuyoshi Aoki , Junichi Kasai
- 申请人地址： JPX Kawaski
- 专利权人： Fujitsu Limited
- 当前专利权人： Fujitsu Limited
- 当前专利权人地址： JPX Kawaski
- 优先权： JPX2-165979 19900625
- 主分类号： H01L21/48
- IPC分类号： H01L21/48 ; H01L21/56 ; H01L23/495 ; H05K3/34 ; H01L21/28 ; H01L21/58 ; H01L21/60
摘要：
A process of manufacturing semiconductor device accommodated in a package including a semiconductor chip, a package body for accommodating the semiconductor chip, and a plurality of terminal members embedded in the package body in electrical connection to the semiconductor chip and projecting from a bottom surface of the package body, wherein each of said terminal members is of spherical form, such that the terminal members roll substantially freely when placed on a flat surface, and of a substantially identical diameter.
公开/授权文献
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