发明授权
US5403785A Process of fabrication IC chip package from an IC chip carrier substrate and a leadframe and the IC chip package fabricated thereby 失效
从IC芯片载体基板和引线框架制造IC芯片封装的工艺和由此制造的IC芯片封装

Process of fabrication IC chip package from an IC chip carrier substrate
and a leadframe and the IC chip package fabricated thereby
摘要:
An IC chip package is fabricated from a substrate carrying an IC chip and formed with a conductive pattern of conductors for electrical connection to the IC chip, and a leadframe having a plurality of connector leads with inner and outer lead sites for electrical connection with associated ones of the conductors and with an external circuit, respectively. Fabrication of the IC chip package is made through the steps of placing the inner lead sites into intimate contact on distal ends of the corresponding conductors, and applying ultrasonic vibrations to contacting surfaces between the inner lead sites and the conductors so as to effect diffusion bonding therebetween. For applying the ultrasonic vibrations, a horn is pressed against the inner lead sites of the connector leads in such a manner as to leave indents in the inner lead sites which act to anchor an encapsulating plastic at the time of encapsulating the IC chip, the substrate, and most of the leadframe, for obtaining tight grip between the encapsulating plastic and the connector leads. At least one of the inner lead site and the distal end of the corresponding conductor may be provided with a suitable plating or bump for facilitating the diffusion bonding.
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