发明授权
- 专利标题: Programmable frequency timing generator with phase adjust
- 专利标题(中): 具有相位调节功能的可编程频率定时发生器
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申请号: US120583申请日: 1993-09-13
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公开(公告)号: US5436628A公开(公告)日: 1995-07-25
- 发明人: Carl F. Liepold
- 申请人: Carl F. Liepold
- 申请人地址: CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: CA Santa Clara
- 主分类号: H03L7/06
- IPC分类号: H03L7/06 ; G06F1/025 ; H03K3/64 ; H03K21/00 ; H03L7/00 ; H03M1/02
摘要:
A programmable timing generator for creating a clock signal of variable duty cycle and frequency with a phase adjustment capability. To perform phase adjustment, the invention includes a mechanism which allows a frequency "walking" or phase adjust to be inserted by just adding or subtracting one time constant into the high or low pulse at a certain time interval. In one embodiment, the invention uses two programable counters, with only one counter counting at a time. One counter counts the high phase of a generated output signal and the other counter counts the low phase of the output signal. The two counters, or a single multiplexed counter, allow the "count high" value to be changed while the "count low" value is being generated. The timing generator only creates outputs which change on rising clock edges of an input clock resulting in an output frequency which is directly related to the input clock. The input clock is divided by a value that can be either an integer or non integer value, with steps as small as 1/4. The output clock is therefore a certain number of integer clock periods high and a certain number of integer clock periods low.
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