A non-volatile semiconductor memory device, includes: a memory cell including an MOS transistor for reading, an MOS transistor for writing, and an MFS transistor provided with a gate having a ferroelectric film above a channel region, one of a drain and a source of the MFS transistor having a common electric potential; a bit line for writing, to which the gate of the MFS transistor is connected through the MOS transistor for writing, and to which multivalued data having at least three voltage levels or analog data is input; a bit line for reading, to which the other of the drain and the source of the MFS transistor is connected through the MOS transistor for reading, and from which multivalued data having at least three voltage levels or analog data is read; a word line for writing connected to a gate of the MOS transistor for writing; and a word line for reading connected to a gate of the MOS transistor for reading.