Invention Grant
US5489545A Method of manufacturing an integrated circuit having a charge coupled
device and a MOS transistor
失效
具有电荷耦合器件和MOS晶体管的集成电路的制造方法
- Patent Title: Method of manufacturing an integrated circuit having a charge coupled device and a MOS transistor
- Patent Title (中): 具有电荷耦合器件和MOS晶体管的集成电路的制造方法
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Application No.: US212143Application Date: 1994-03-14
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Publication No.: US5489545APublication Date: 1996-02-06
- Inventor: Minoru Taguchi
- Applicant: Minoru Taguchi
- Applicant Address: JPX Kawasaki
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JPX Kawasaki
- Priority: JPX3-054817 19910319
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L21/339 ; H01L21/8234 ; H01L21/8238 ; H01L27/105 ; H01L29/762 ; H01L21/70 ; H01L21/02 ; H01L27/00
Abstract:
An integrated circuit comprises a charge coupled device and an MOS transistor. The charge coupled device has a lower and an upper gate electrode on the substrate. The insulating film between the substrate and the electrodes comprises silicon nitride. The insulating film between the electrodes is formed by thermal oxidizing the lower gate electrode using the silicon nitride film as a mask.
Public/Granted literature
- US4873757A Method of making a multilayer electrical coil Public/Granted day:1989-10-17
Information query
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