Disclosed is a system that determines whether input and output leads of semiconductor components are present and properly soldered to a printed circuit board. The system includes a signal source which is connected to a wiring trace on the printed circuit board, which is soldered to the lead being tested. A capacitive test probe is placed on top of the component and connected to a capacitance measuring device. The signal source signal is capacitively coupled through the lead of the integrated circuit package being tested to the capacitive test probe, so if a predetermined capacitance is measured by the capacitance measuring device, the lead is connected to the circuit assembly. As the capacitances being measured are small, the capacitive test probe may include an amplifier, a shield or a buffer circuit to reduce stray capacitance.