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公开(公告)号：US06549079B1
公开(公告)日：2003-04-15
申请号：US10008433
申请日：2001-11-09
申请人： David T. Crook
发明人： David T. Crook
IPC分类号： H03L700
CPC分类号： H03L7/107 , H03L7/0898 , H03L7/095 , H03L7/18 , Y10S331/02
摘要： Feedback control loop systems are provided that enhance output-signal switching times without degrading other loop performance parameters. The systems reduce “kick-back” voltages that are generated in a loop filter by drive currents which rapidly drive a control loop oscillator to a loop acquisition range. This reduction reduces a frequency step in the oscillator output signal which would otherwise have to be driven to eliminate the frequency step with a consequent increase in the output-signal switching time. Structures are provided that reduce the kick-back voltage to thereby enhance output-signal switching times.
摘要翻译： 提供了反馈控制回路系统，可以增强输出信号切换时间，而不会降低其他回路性能参数。 系统通过驱动电流降低在环路滤波器中产生的“反冲”电压，驱动电流将控制环路振荡器快速驱动到回路采集范围。 这种减少减少了振荡器输出信号中的频率步长，否则，必须驱动振荡器输出信号以消除频率步长，从而导致输出信号切换时间的增加。 提供了降低反冲电压从而增强输出信号切换时间的结构。
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2.发明授权Adaptive feedback-loop controllers and methods for rapid switching of oscillator frequencies 有权自适应反馈回路控制器和快速切换振荡器频率的方法公开(公告)号：US06522206B1
公开(公告)日：2003-02-18
申请号：US09973281
申请日：2001-10-09
申请人： John J. Kornblum , David T. Crook
发明人： John J. Kornblum , David T. Crook
IPC分类号： H03L700
CPC分类号： H03L7/107 , H03L7/0898 , H03L7/095 , H03L7/113 , Y10S331/02
摘要： Feedback methods and systems are provided to achieve rapid switching of oscillator frequencies without compromising operational feedback loop bandwidths that filter out spurious tones and phase noise to thereby enhance loop spectral and noise performance. The methods respond to frequency changes in a reference signal by providing an open-loop drive current to drive a feedback signal towards the reference signal. The drive current is terminated and the feedback control loop closed when the feedback signal is within a predetermined acquisition range of the reference signal. This is determined by successively comparing a feedback frequency of the feedback signal to a destination frequency of the reference signal over a comparison window of time. The invention also provides a feedback control system that practices the invention's methods.
摘要翻译： 提供反馈方法和系统以实现振荡器频率的快速切换，而不会影响滤除伪噪声和相位噪声的操作反馈环路带宽，从而增强环路频谱和噪声性能。 该方法通过提供开环驱动电流来驱动参考信号的反馈信号来响应参考信号中的频率变化。 当反馈信号在参考信号的预定采集范围内时，驱动电流终止并且反馈控制回路闭合。 这通过在比较时间窗口上连续地比较反馈信号的反馈频率与参考信号的目的地频率来确定。 本发明还提供了实现本发明方法的反馈控制系统。
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3.发明授权Identification of pin-open faults by capacitive coupling through the integrated circuit package 失效通过集成电路封装的电容耦合识别引脚开路故障
公开(公告)号：US5557209A
公开(公告)日：1996-09-17
申请号：US400787
申请日：1995-03-07
IPC分类号： G01R31/04 , G01R31/312 , G01R31/02
CPC分类号： G01R31/048 , G01R31/046 , G01R31/312
摘要： Disclosed is a system that determines whether input and output pins of semiconductor components are present and properly soldered to a printed circuit board. The system uses an oscillator which supplies a signal, typically ten kilohertz (10 kHz) at 0.2 volts, to the pin under test. A conductive electrode is placed on top of the component package. The electrode is connected to a current measuring device. Another pin of the component is connected to the common signal return. Typically the other pin is chosen to be a power or ground pin of the component.
摘要翻译： 公开了一种确定半导体部件的输入和输出引脚是否存在并被适当地焊接到印刷电路板的系统。 该系统使用一个振荡器，该信号通常以0.2伏特的十千赫兹（10 kHz）信号提供给被测试的引脚。 导电电极放置在组件封装的顶部。 电极连接到电流测量装置。 组件的另一个引脚连接到公共信号返回。 通常，另一个引脚被选择为部件的电源或接地引脚。
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公开(公告)号：US07026846B1
公开(公告)日：2006-04-11
申请号：US10888144
申请日：2004-07-09
IPC分类号： G06F1/02
CPC分类号： G06F1/022
摘要： Synthesizers are provided to generate synthesizer signals in response to primary digital signal representations that are created by a signal generator. In an important feature, the synthesizers further include a signal corrector that inserts correction digital signal representations to at least partially cancel a corresponding spurious component in the primary digital signal representation and thereby provide synthesizer signals with reduced spurious content.
摘要翻译： 提供合成器以响应由信号发生器产生的主数字信号表示而产生合成器信号。 在一个重要特征中，合成器还包括一个信号校正器，其插入校正数字信号表示以至少部分地消除主数字信号表示中相应的杂散分量，从而提供具有减少的杂散内容的合成器信号。
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5.发明授权Method and apparatus for supplying power, and channeling analog measurement and communication signals over single pair of wires 失效用于提供电力的方法和装置，以及通过单根导线引导模拟测量和通信信号公开(公告)号：US06901336B2
公开(公告)日：2005-05-31
申请号：US10404180
申请日：2003-03-31
CPC分类号： H04L25/02 , H04B2203/5458 , H04L25/0282
摘要： A novel technique for transferring power, measurement signals, and communication signals between two electrical devices over a single wire pair is presented. A host device supplies power to a sensor device over the wire pair. The sensor device obtains A/C signals by modulating the current component of the power signal on the wire pair. The host device de-modulates the current component of the power signal on the wire pair to recover the A/C measurement signals. The sensor device generates a serial bit stream containing sensor communication signals, and modulates it with either the voltage-or current-component of the power signal present on the wire pair. The host device appropriately de-modulates the power signal to recover the serial bit stream containing the sensor communication signals.
摘要翻译： 提出了一种用于通过单线对在两个电气设备之间传输功率，测量信号和通信信号的新技术。 主机设备通过线对为传感器设备供电。 传感器装置通过调制线对上的电力信号的电流分量来获得A / C信号。 主机设备对线对上的电源信号的电流分量进行解调，以恢复A / C测量信号。 传感器装置产生包含传感器通信信号的串行比特流，并且用线对上存在的功率信号的电压或电流分量进行调制。 主设备适当地解调功率信号以恢复包含传感器通信信号的串行比特流。
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6.发明授权公开(公告)号：US06621354B1
公开(公告)日：2003-09-16
申请号：US09975926
申请日：2001-10-12
申请人： John J. Kornblum , David T. Crook
发明人： John J. Kornblum , David T. Crook
IPC分类号： H03L710
CPC分类号： H03L7/12 , H03L7/0898 , H03L7/095 , H03L7/107 , H03L7/113 , H03L7/18 , Y10S331/02
摘要： Feedback methods and systems are provided to achieve rapid switching of oscillator frequencies without compromising operational feedback loop bandwidths that filter out spurious tones and phase noise to thereby enhance loop spectral and noise performance. The methods respond to frequency changes in a reference signal by providing an open-loop drive current to drive a feedback signal towards the reference signal. The drive current is terminated and the feedback control loop closed when the feedback signal is within a predetermined acquisition range of the reference signal. Preferably, the closed loop is initially configured with a first feedback bandwidth and is subsequently reconfigured with a second steady-state feedback bandwidth that is less than the first feedback bandwidth. The invention also provides a feedback control system that practices the invention's methods
摘要翻译： 提供反馈方法和系统以实现振荡器频率的快速切换，而不会影响滤除伪噪声和相位噪声的操作反馈环路带宽，从而增强环路频谱和噪声性能。 该方法通过提供开环驱动电流来驱动参考信号的反馈信号来响应参考信号中的频率变化。 当反馈信号在参考信号的预定采集范围内时，驱动电流终止并且反馈控制回路闭合。 优选地，闭环最初配置有第一反馈带宽，并且随后利用小于第一反馈带宽的第二稳态反馈带宽来重新配置。 本发明还提供了实现本发明方法的反馈控制系统
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7.发明授权Dual tunable direct digital synthesizer with a frequency programmable clock and method of tuning 失效具有频率可编程时钟和调谐方式的双可调直接数字合成器
公开(公告)号：US5898325A
公开(公告)日：1999-04-27
申请号：US895717
申请日：1997-07-17
CPC分类号： H03B21/00 , G06F1/0328
摘要： A dual-tunable direct digital synthesizer is provided with a programmable frequency multiplier that multiplies a relatively low frequency fixed clock signal F.sub.clk so that the output frequency F.sub.o of the waveform is:F.sub.o =(F.sub.n /2.sup.N).times.(M.times.F.sub.clk)where N is the resolution of the digital control word, the tuning word F.sub.n is the value of the N-bit control word, M is the multiplication factor and M*F.sub.clk is the DDS clock frequency. The multiplication factor and, hence, the DDS clock can be reduced to track changes in the output frequency thereby lowering the average power consumption. Because the synthesizer can generate the same output frequency using different tuning word-to-DDS clock ratios, it can be tuned for optimum SFDR over a narrow band around the desired output frequency. In other words, an "enhanced dynamic range band" in the harmonic and spurious performance can be mapped out for each frequency in the bandwidth.
摘要翻译： 双调谐直接数字合成器具有可编程倍频器，其将相对低频的固定时钟信号Fclk相乘，使得波形的输出频率Fo为：Fo =（Fn / 2N）×（MxFclk）其中N为 数字控制字的分辨率，调谐字Fn是N位控制字的值，M是乘法因子，M * Fclk是DDS时钟频率。 因此，可以减少乘法因子和DDS时钟以跟踪输出频率的变化，从而降低平均功耗。 由于合成器可以使用不同的调谐字DDS时钟比产生相同的输出频率，因此可以针对所需输出频率周围的窄带调节最佳SFDR。 换句话说，可以为带宽中的每个频率映射谐波和杂散性能中的“增强型动态范围带”。
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8.发明授权High speed active overvoltage detection and protection for overvoltage sensitive circuits 失效用于过电压敏感电路的高速有源过压检测和保护
公开(公告)号：US5479119A
公开(公告)日：1995-12-26
申请号：US344452
申请日：1994-11-23
摘要： An overvoltage protection circuit protects against saturation and damage of sensitive circuitry elements. The protection circuit includes an out-of-range detector which compares an input signal to reference levels to determine if it is within a predetermined range of acceptable inputs. If the input is determined not to be within this range, a control circuit substitutes a supplemental signal within the range for the input signal. Digital correction can be provided to correct the output of the sensitive circuit element while the supplemental signal is being substituted. Numerous circuit designs may be used to implement the protection scheme.
摘要翻译： 过压保护电路可以防止敏感电路元件的饱和和损坏。 保护电路包括超出范围检测器，其将输入信号与参考电平进行比较，以确定其是否在可接受输入的预定范围内。 如果确定输入不在该范围内，则控制电路将输入信号范围内的补充信号代入。 可以提供数字校正以在补充信号被替代时校正敏感电路元件的输出。 可以使用许多电路设计来实现保护方案。
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公开(公告)号：US5274336A
公开(公告)日：1993-12-28
申请号：US820711
申请日：1992-01-14
IPC分类号： G01R1/06 , F02P17/00 , G01R1/067 , G01R1/07 , G01R31/26 , G01R31/28 , G01R31/302 , G01R31/312 , G01R27/26
CPC分类号： G01R31/2806 , G01R1/07 , G01R31/2886 , G01R31/312 , F02P2017/006 , G01R31/3025
摘要： The invention is a capacitively coupled probe which can be used for non-contact acquisition of both analog and digital signals. The probe includes a shielded probe tip, a probe body which is mechanically coupled to the probe tip, and an amplifier circuit disposed within the probe body. The amplifier circuit receives a capacitively sensed signal from the probe tip and produces an amplified signal in response thereto. The amplifier has a large bandwidth to accommodate high-frequency digital signals. Further, the amplifier has a very low input capacitance and a high input resistance to reduce signal attenuation and loading of the circuit being probed. The amplifier circuit is disposed in the probe body closely adjacent to the probe tip in order to reduce stray and distributed capacitances. A reconstruction circuit reconstructs digital signals from the amplified capacitively sensed signal.
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10.发明授权Circuits and apparatus which enable elimination of setup time and hold time testing errors 失效能够消除设置时间和保持时间测试错误的电路和设备
公开(公告)号：US4799023A
公开(公告)日：1989-01-17
申请号：US753366
申请日：1985-07-05
IPC分类号： G01R31/319 , G01R31/3193 , H03K5/1534 , H03K5/22 , G01R15/12
CPC分类号： G01R31/31926 , G01R31/31937 , H03K5/1534
摘要： An improved digital testing device is presented which includes the capability to detect and avoid a pair of common sources of measurement error. One source of error occurs when measurements are made within a Setup time before a transition in the signal under test or during a Hold time after such a transition. This device includes the ability to detect when this occurs and to insert a relative delay between the measurements and transitions to eliminate such errors. The device also detects the existence of a 3-state condition of a point of the circuit under test during the period of a measurement and provides an output indication when such occurs.
摘要翻译： 提出了一种改进的数字测试装置，其包括检测和避免一对常见的测量误差源的能力。 在测试信号转换之前的建立时间内或在这种转换之后的保持时间期间进行测量时，会发生错误的一个来源。 该设备包括检测何时发生这种设备并在测量和转换之间插入相对延迟以消除这种错误的能力。 该装置还在测量期间检测是否存在被测电路的3状态条件，并在发生这种情况时提供输出指示。
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