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US5557209A Identification of pin-open faults by capacitive coupling through the integrated circuit package 失效
通过集成电路封装的电容耦合识别引脚开路故障

Identification of pin-open faults by capacitive coupling through the
integrated circuit package
Abstract:
Disclosed is a system that determines whether input and output pins of semiconductor components are present and properly soldered to a printed circuit board. The system uses an oscillator which supplies a signal, typically ten kilohertz (10 kHz) at 0.2 volts, to the pin under test. A conductive electrode is placed on top of the component package. The electrode is connected to a current measuring device. Another pin of the component is connected to the common signal return. Typically the other pin is chosen to be a power or ground pin of the component.
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