发明授权
- 专利标题： Clock speed limiter for an integrated circuit
- 专利标题（中）： 集成电路的时钟限速器
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申请号： US355859申请日： 1994-12-14
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公开(公告)号： US5592111A公开(公告)日： 1997-01-07
- 发明人: Keng L. Wong , Alexander Waizman , Bart R. McDaniel
- 申请人： Keng L. Wong , Alexander Waizman , Bart R. McDaniel
- 申请人地址： CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： CA Santa Clara
- 主分类号： G06F11/00
- IPC分类号： G06F11/00 ; G01R23/02 ; H03D3/00
摘要：
A speed governor for an integrated circuit which prevents the operation of the integrated circuit above a selected frequency. The speed governor generates a frequency reference and compares the frequency reference to the frequency of the external clock signal that clocks the integrated circuit. As a result of the comparison, if the frequency of the input clock signal is greater than the frequency reference then operation of the integrated circuit is disrupted.
公开/授权文献
- US4418103A Filling material and process for manufacturing same 公开/授权日：1983-11-29
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