A PLL (phase-locked loop) circuit is used in apparatus for testing individual circuits in circuit devices. The PLL circuit operates at an input frequency provided by the output of an input oscillator when this oscillator is connected to one of the inputs of a phase comparator within the PLL circuit. When this connection is not made, the PLL circuit operates at a freerunning frequency, which is varied by connecting a circuit under test with a frequency controlling node present within a voltage-controlled oscillator in the PLL circuit. In a first mode of operation, the circuit under test is initially connected to the frequency controlling node, but the input oscillator is not connected to the phase comparator. When the input oscillator is so connected, the frequency of oscillations moves from a freerunning frequency associated with the circuit under test to the input frequency. During this transient behavior, the output of a loop filter within the PLL circuit is periodically sampled and encoded using an ADC (analog to digital converter) circuit. In a second mode of operation, the circuit under test is initially not connected to the PLL circuit, but the input oscillator is initially so connected. When the circuit under test is connected, transient behavior is caused, which is again recorded using the ADC. In either case, codes generated by the ADC circuit are read by the processor of a computing system for comparison with codes similarly generated using a circuit known not to have fault conditions.