The time and labor required for bias temperature (BT) treatment of a semi-conductor wafer is reduced by utilizing apparatus in which turning a switch 40 on connects a first d.c. power source 30 to apply a positive high voltage between a first wire 20 and a semiconductor wafer 100 while a second d.c. power source 32 applies a negative high voltage between a second wire 22 and the semiconductor wafer 100. This results in positive corona discharge between the first wire 20 and the semiconductor wafer 100 and negative corona discharge between the second wire 22 and the semiconductor wafer 100. After cessation of corona discharge, the semiconductor wafer 100 is heated to a high temperature for a predetermined time period with a heater 120 embedded in a stage 110 that supports the wafer that is being treated.