发明授权
- 专利标题: Reference voltage generating circuit
- 专利标题(中): 基准电压发生电路
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申请号: US522439申请日: 1995-08-31
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公开(公告)号: US5646516A公开(公告)日: 1997-07-08
- 发明人: Yoichi Tobita
- 申请人: Yoichi Tobita
- 申请人地址: JPX Tokyo
- 专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX6-206555 19940831; JPX7-133257 19950531
- 主分类号: H01L27/04
- IPC分类号: H01L27/04 ; G05F3/24 ; G05F3/26 ; G11C11/407 ; H01L21/822 ; G05F3/16
摘要:
An MOS transistor Q3 operates in a diode mode, and applies a voltage which is lower than a power supply voltage Vcc by an absolute value of its threshold voltage to the gate of an MOS transistor Q1. MOS transistor Q1 operates in a saturation region, and a supplies current which is in proportion to the difference between the threshold voltages of MOS transistors Q3 and Q1 to an output node 2. An MOS transistor Q4 also operates in a diode mode and applies a voltage equal to its threshold voltage to the gate of MOS transistor Q2. MOS transistor Q2 operates in a saturation region, and discharges current which is in proportion to the difference between the gate-source voltage and the threshold voltage. The currents flowing through MOS transistor Q1 and through MOS transistor Q2 are equal to each other. Accordingly, the dependency upon temperature of the threshold voltages is canceled, and thus an output voltage V0 with extremely low dependency upon temperature can be obtained at output node 2. A circuit which generates a reference voltage with no dependency upon power supply voltage and extremely low dependency upon temperature is provided.
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