A data processing system (55) and method thereof includes one or more data processors (10). Data processor (10) is capable of performing both vector operations and scalar operations. Using a single microsequencer (22), data processor (10) is capable of executing both vector instructions and scalar instructions. Data processor (10) also has a memory circuit (14) capable of storing both vector operands and scalar operands. The data processing system (55) includes a plurality of instructions which include and utilize an extension bit during execution. In one embodiment, a plurality of instructions, both arithmetic and non-arithmetic, use extension bits for preliminary and non-preliminary instructions in order to accommodate large data widths.